In the constant strive for electronics being more power efficient, faster and having more processing power new methods for producing semiconductor devices, such as transistors, of ever decreasing dimensions are developed. This has led the semiconductor industry to develop new types of device designs such as fin-type field effect transistors, also known as FinFETs. A FinFET is a device where the conducting channel is formed by a fin-shaped structure (or shorter a “fin”) that forms the body of the device and a gate stack extending across and transverse to the fin. FinFETs may also be formed as multi-channel devices with a plurality of parallel fins and one or more transversely extending gate stacks.
Traditionally during ion implantation of a FinFET, implantation masks may be used to mask portions of the semiconductor material which are not to be implanted. A good implantation stop power is desirable to limit or minimize the number of impinging ions from reaching the masked portions. However prior art processes for removing implantation masks may adversely affect the semiconductor material forming the fins. This may among others result in critical dimensions (CD) of the semiconductor device being lost. As device dimensions are reduced, CD loss becomes even less acceptable.